IBM Research demonstrates critical advancement in EUV lithography infrastructure for 7nm node and beyond

Editor’s note: This article is by Matthew Colburn, PhD, senior manager Strategic Patterning Research, IBM Research

Last year, IBM Research and our partners announced the industry’s first functional 7nanometer node test chips, utilizing EUV Lithography. It represents the most significant chip-industry design and manufacturing innovations in nearly a decade.

This week our Semiconductor Technology Research will announce the first successful inspection of a patterned Extreme Ultraviolet (EUV) mask through a novel EUV pellicle membrane. This breakthrough helps lay the foundation to integrate EUV lithography into the standard CMOS chip making process. 

Image of mask used for
comparative inspection
(no pellicle top, half-pellicle bottom)

In semiconductor fabrication, a mask is used to print a circuit design on a silicon substrate. This mask is protected from environmental contamination by a protective film, called a pellicle, that is crucial for manufacturing yield.

In this work, IBM has fabricated full size silicon nitride pellicle membranes that meets the industry’s target of 90 percent EUV transparency, using conventional semiconductor and MEMS fabrication methodologies. The differentiating feature of the IBM pellicle is its transparency at the industry standard inspection wavelength (193nm), which enables the use of existing infrastructure for through-pellicle mask defect inspection. Complete technical details of the first mask inspection through the IBM EUV pellicle will be discussed during the 2016 SPIE Advanced LithographyConference in San Jose, CA. 

ASML NXE-3300B EUV scanner at IBM EUV Center of Excellence in Albany, NY

The reported achievement is the culmination of several years of effort at the IBM T. J. Watson Research Center in Yorktown, NY, and part of IBM’s EUV Center of Excellence (COE) in Albany, NY – home to our ASML NXE-3300B EUV scanner. The IBM EUV CoE became operational in 2013 and focuses on driving a complete EUV solution that encompasses tooling, materials, process, mask-use, and computational capability for integration into the industry’s high volume semiconductor manufacturing solution. 

Full size EUV pellicle membrane