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Zhuo Li, IBM Research
Staff Member |
Zhuo Li, an entrepreneur
and engineer, is now the IEEE’s Council on Electronic Design Automation (CEDA)
Early Career award winner for his work on chips in everything from game consoles to
mainframes. Already in college by the age of 13, Zhuo earned his Bachelor and
Master degrees in Electrical Engineering at Xi’an Jiaotong University in Xi’an,
China. He then came to US in 2001 to complete his PhD at Texas A&M
University.
Zhuo tried his hand at entrepreneurship after graduation and
started up Pextra Corp. to develop a CAD software specialized in parasitic
extraction. But in 2006, he joined IBM Research's lab in Austin, Texas to develop CAD
software for chips found in the Sony PlayStation, X-Box and X-Box 360, and Nintendo
Wii.
Zhuo’s work has also spanned almost every chip in IBM
mainframe, storage and POWER series servers – and even the new neurosynaptic
chip as part of the
SyNAPSE Project – to the high-end ASIC chips used by Cisco,
Ericsson, Brocade, and others.
Nationality: Chinese
Career
Highlights
- 60 publications
- 42 patents filed
- 20 patents issued
- Worked on the chips in PS3, X-Box, Ninteno Wii, and Watson
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Work focus: VLSI CAD (Computer-Aided Design for Very
Large Scale Integration Chips), also referred to as Electronic Design
Automation, is the design of tools – really algorithms – to help hardware and
computer engineers design and build chips more efficiently. Our software models
and algorithms automate everything about the chip. So, just in the same way
AutoCAD software aids architects in designing buildings, our CAD software models
microprocessors.
We test real-use scenarios, such as “what else happens to the
chip if it performs a particular function,” right down to where a transistor
must be placed, or a metal wire must be connected, and how much power would be
required to perform at a certain clock speed up to 5 GHz.
Our algorithms also help chip developers test how the billions
of components interact in different situations. A chip might work perfectly in
a climate-controlled lab, but what about inside a cell phone being used
outdoors in the Texas summer heat? And will those components hold up for years
of use, not just a few days?
There's no way to test these components, or the cascade of
changes across those components, manually. For example, a single Power chip
used in the Watson system has a billion transistors in about a 567 millimeter^2
space. No one is manually placing those chips onto the system!
Ultimately, our tools make sure these chips are designed and
produced faster and at a better quality, all while using less power.
Sharing knowledge: I currently chair two local IEEE society
chapters, one around circuit and systems and solid state circuits, and also the
first Texas Council on EDA chapter. We arrange seminars and workshops for local
engineers across academia and industry. Anyone interested in circuits,
computers, systems and EDA software can attend.
We also started an international CAD contest for students
across the world. Last year, the first year of the contest, we had 56 entries
from seven regions. This year, we already have 87 entries from 9 regions. We
pose three problems for the participants. And each team, consisting of one to
three students, can choose to solve one or all three problems (within a given
benchmark) over the next six months. The most innovative and efficient
solutions will win a monetary award at our November conference. Winners will
also present their work, and their new benchmarks will be released as well.
The main focus of these organizations and contest – and why
I participate – is to increase student interest in this field by asking them to
solve real industry problems.
Early career recognition: CEDA’s Early Career Award
honors individuals who have made innovative and substantial technical
contributions to EDA in the early stages of his or her careers. Contributions
are evaluated according to the individual’s technical merit and creativity in
performing research, with consideration of his or her published record and the
references accompanying the nomination.
The IEEE’s EDA Council recognized me for “essential and
outstanding contributions to algorithms, methodologies, and software for
interconnect optimization, physical synthesis, parasitic extraction, testing,
and simulation.”
It’s an honor to be the first “Early Career” award winner
from industry since it launched in 2009 (all previous winners are from academia).
Career advice: Keep an open mind. From my own
experience, the start up culture is very different from the corporate culture,
and I’ve learned from both. To me, when you look at other fields by reading
papers, or just meeting other engineers, what you learn can help with your own
work and ideas.
In 2010 I participated in IBM's in-house “new talent
showcase” at my manager's suggestion. So, I had to come up with a new way to
describe my work. The judges were from different backgrounds, and they needed
to understand what I was presenting.
So, I used an analogy of highway planning and construction.
Computer aided design is like planning the “roads” of a chip: what are the
most-efficient routes (highway exits and stop lights)? Which layer should we
use (toll-roads versus a local road)? And where should the repeaters (gas stations)
be?
I think this helped me win that year's competition. And I
wouldn't have thought about it unless I had been asked to keep an open mind and
enter the competition.
Keeping an open mind has also helped solve other problems.
For example, I have patents that apply to IBM's
Smart Grid solutions regarding how
to reliably connect power plants and other utility distribution networks (such
as a water pipeline). This is because our team found a similarity in the
problems we face with chips, and the issues our colleagues face working on
electric grids – which we only found because we paid attention to what else is
happening within the company and industry.
Labels: austin, CEDA, design automation, ieee, synapse