Carbon nanotubes to keep up with Moore’s Law

Editor’s note: This article is by Dr. Hongsik Park and Dr. Wilfried Haensch. Dr. Park is a research scientist at IBM’s Thomas J. Watson Research Center. Dr. Haensch is a senior manager and the Carbon Nanotube project leader at IBM Research.  

The end of silicon microprocessors is near. Well, the end of continued performance improvements in silicon chips is near. One of its promising successors in the Moore’s Law race – we, at IBM Research think – is carbon nanotubes. And our team successfully fabricated and evaluated 10,000 carbon nanotube transistors on a single chip by precisely positioning nanotubes on designated sites on a substrate. 

We expect carbon nanotubes’ promise of sub-10nm chips will mean aggressive scaling toward smaller chips. And increasing the number of cores on a chip would also provide an even higher degree of parallel processing. Our models show that carbon nanotube chips would have about a five to 10 times improvement in performance compared to silicon circuits.

Lining up carbon nanotubes with a density higher than 1010/cm2 is just one of many challenges to scale and mass produce this technology before replacing silicon.

Working at nanoscale

Carbon nanotubes and nanowires are smaller than the resolution capable of an optical microscope. We use a scanning electron microscope and atomic force microscopy to “see” them. To fabricate nanoscale devices with a resolution smaller than 100 nm, we utilize electron beam lithography. 

For example, to fabricate 10,000 aligned carbon nanotube transistors we first fabricate a substrate that has 10,000 sites for each transistor. Through a chemical placement method, we put individual carbon nanotubes on a designated site – only then can the transistors be formed on the carbon nanotubes using conventional semiconductor fabrication facilities (shown in figure 3a in our paper in Nature Nanotechnology).

10nm reality

A carbon nanotube microchip won’t look any different to the naked eye than today’s chips. But replacing active layers of silicon requires scaling all of the manufacturing processes down to 10 nm. This means we must improve the efficiency of putting carbon nanotubes on the substrate, or we may have to develop new chemical methods to uniformly place multiple carbon nanotubes onto sites for the transistor.  

Once manufacturable, carbon nanotube chips will have more functionality than conventional silicon chips. The first place we’ll expect to see carbon nanotube logic chips is in the high performance space, such as server chips and business transaction machines that need high single-thread performance.

Manufacturing challenges not withstanding, we believe carbon nanotube transistors could reach a 5nm channel length. And carbon nanotubes are also being pursued as material in transparent electrodes for display or photovoltaic devices, and many other applications.

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